Principal Engineer with 20+ years of expertise in Computer Architecture and System Software. Proven technical
leader in building foundational validation frameworks for ARM (Apple Silicon) and RISC-V. Expert at bridging the
HW/SW gap and leveraging AI development workflows to ensure software readiness and accelerate complex SoC
delivery.
Work Experience
Software Engineer at Meta (Dec 2025 - Present)
Working on the software stack for MTIA systems.
Software Engineer at Rivos (Oct 2021 - Dec 2025)
Built foundational software and validation environments needed to deliver a high-performance RISC-V SoC. This
included the bare-metal stacks and verification infrastructure used throughout the design cycle, as well as
providing technical leadership in CPU modeling and verification.
I also promoted LLM-assisted development and agentic workflows across the company to modernize our engineering
productivity.
CPU Design Engineer at Apple (July 2009 - Oct 2021)
Built tools for CPU design and validation across multiple generations of Apple Silicon. These included
simulators, test generators, and silicon bring-up environments that have been instrumental in shipping the best
CPUs in the world.
Part of the Apple Silicon transition team; built the debugger infrastructure for Rosetta 2 to enable a seamless
move from x86 to Apple Silicon.
CPU Verification Engineer at Sun Microsystems
(July 2004 - July 2009)
Developed Sun's multiprocessor memory consistency checker (TSOtool) and MMU testing functionality for verifying
UltraSPARC processors.
Featured Open Source Projects
These are a selection of projects I have been able to open-source: